This paper presents a 5V-to-3.3V linear regulator circuit, which uses 3.3V CMOS transistors to replace the 5V CMOS transistors.\nThus, the complexity of themanufacturing semiconductor process can be improved.The proposed linear regulator is implemented\nby cascode architecture, which requires three different reference voltages as the bias voltages of its circuit.Thus, the three-output\ntemperature-independent reference voltage circuit is proposed, which provides three accurate reference voltages simultaneously.\nThe three-output temperature-independent reference voltages also can be used in other circuits of the chip. By using the proposed\ntemperature-independent reference voltages, the proposed linear regulator can provide an accurate output voltage, and it is suitable\nfor low cost, small size, and highly integrated system-on-chip (SoC) applications. Moreover, the proposed linear regulator uses\nthe cascode technique, which improves both the gain performance and the isolation performance. Therefore, the proposed linear\nregulator has a good performance in reference voltage to output voltage isolation.The voltage variation of the linear regulator is less\nthan 2.153% in the temperature range of âË?â??40âË?Ë?Cââ?¬â??120âË?Ë?C, and the power supply rejection ratio (PSRR) is less than âË?â??42.8 dB at 60Hz.\nThe regulator can support 0âË?¼200mA output current. The core area is less than 0.16m
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